Synthesized from 171 episodes of The Amp Hour · AI-generated, every claim cited to a verbatim transcript passage
mentions 2010–2026
Episodes171
Mentions260
Cited here77
First — last#2 — #729
Top guestsJeff Keyzer, Jeri Ellsworth, Andrea Morello
Relatedresistor · op amp · integrated circuit · capacitor · led

A transistor is a semiconductor device used to switch or amplify electrical signals; in a classical processor, information is encoded in the electrical state of nanoscale transistors, with low and high voltage representing zero and one and logic performed by one transistor’s state switching another’s.[498] The point-contact transistor, the junction transistor and the field-effect transistor all originated at Bell Labs, where the device was invented at the Murray Hill site in New Jersey.[328] A licensing settlement obliging AT&T to make the technology available to other firms turned the invention into an industry rather than one company’s product.[333] The economics of the device have since moved from roughly a week’s wages for a single transistor in the early 1960s to about two cents for a fully characterised small-signal part, and to on the order of a nanopenny per gate in integrated logic.[709][78][302]

History

The transistor was invented at Bell Labs’ Murray Hill site in New Jersey, the organisation’s research centre from the 1930s onward; the earlier West Street buildings in New York where the laboratories began also survive.[328] The point-contact transistor, the junction transistor and the field-effect transistor were all Bell Labs discoveries, and the laboratory also commercialised fibre optics.[328] Surface states were the principal obstacle to the first point-contact transistor; the breakthrough came when the contact tip was immersed in an electrolyte, after which amplification was observed and recorded in the laboratory notebooks, and surface states remain a limiting problem for anyone fabricating semiconductors, point-contact devices most of all.[328] Manufacture of transistors outside AT&T was enabled by a licensing settlement obliging the company to make its technology available to other firms.[333]

The transistor succeeded two earlier switching technologies that had each run into physical limits. Relays reached limits of contact bounce, whole-system vibration causing bit errors elsewhere, heat and packaging; vacuum tubes then behaved almost ideally until pushed for speed, at which point crosstalk and propagation knowledge became essential, with the last tube machines distributing a clock from one tube to three hundred others across three buildings; transistors shrank the packages and raised the speed, and the cycle of limits restarted.[77] Subsequent gains in serial communication speed have come primarily from the silicon rather than from connectors, cables or protocols, because smaller transistors inside transceivers switch faster; connectors scale by simple shrinking, while cable materials set a speed-distance product through skin-effect and dielectric losses.[77]

In the early 1960s a single transistor cost about a week’s wages, putting electronics beyond reach as a student hobby.[709] A single-transistor radio built from a mail-order parts list was a standard first construction project for a hobbyist in 1957; Forrest Mims, a practitioner of that generation, deliberately avoided vacuum tubes from the outset in favour of semiconductor diodes.[171] The first transistor-based wristwatch appeared in 1960 with a germanium transistor and was reworked in the mid-1960s to run a silicon NPN with rewound coils once germanium parts became hard to obtain; a single transistor drives two coils that excite a roughly 300 Hz tuning fork, which is why the movement hums and the second hand sweeps continuously.[313] In the discrete point-to-point era, circuit simplicity was imposed by physical space rather than chosen: adding even three or four more transistors to a wristwatch-sized assembly was not feasible.[313]

The device generally credited as the first integrated circuit, demonstrated in 1958, was two transistors on a single substrate, built by miniaturising existing transistor structures onto silicon.[60] Credit for the first integrated circuit is contested between Texas Instruments and Fairchild depending on how an integrated circuit is defined, while Bell Labs produced the first discrete transistor.[200] The Saturn launch vehicle digital computer used hybrid modules containing only a couple of transistors each, deliberately built from established radiation-hardened technology rather than the newer integrated circuits used in the Apollo guidance computer, because the launch vehicle was needed before the command module and the schedule allowed no unproven process; the whole machine was immersed in circulating coolant held at constant temperature.[263] Custom single-in-line integrated circuits of the period held dozens of transistors rather than thousands.[253] The 6502 microprocessor contains about 3,500 transistors, and its layout was drawn by hand by one person rather than by a team.[25] Before computer layout, integrated circuit masks were laid out physically at very large scale: a room about thirty feet square held the masks on the floor with each transistor roughly three inches on a side, and reviewers walked across them in stocking feet.[424]

Discrete transistors

Standard types and selection

The general-purpose small-signal “jellybean” transistors differ by region: the 2N3904 (NPN) and 2N3906 (PNP) are the standard parts in the United States, while the BC547, BC548 and 2N2222 fill the same role elsewhere, and house-branded equivalents such as the PN100 and PN200 are marketed as compatible with all of them.[18] For ordinary digital switching work only two or three NPN types need to be stocked; an internal component specification can be written as a set of tolerances a part must fall within, listing several qualifying manufacturer part numbers rather than mandating a single one.[125] A fully characterised small-signal transistor costs about two cents, which removes device cost from most small-signal design decisions.[78] Jellybean transistors such as the 2N3904 are straightforward to manufacture and are second-sourced widely, which is why alternative catalogues carry large numbers of unfamiliar equivalents; whether the more complex parts from the same suppliers are re-engineered equivalents or direct clones is generally not documented.[484]

Substituting a jellybean part such as the 2N3904 for a better-specified transistor trades circuit margin against supply risk, and is justified only where the specification has slack; on programmes with fixed specifications the part must meet them regardless of cost.[211]

Biasing and rules of thumb

An NPN transistor with its emitter at ground and its base driven on sits at roughly 0.7 V base-emitter, and that fixed drop is used to back-calculate the surrounding node voltages rather than merely noted; ordinary diodes and LEDs are treated the same way, with Schottky diodes at about 0.2 V.[301] A 2N3904 in a simple circuit never needs more than about 10 mA of base current, because the device’s current gain sets the collector current from the base current and the collector-emitter path has its own separate limit.[301] Data sheets for jellybean transistors have been progressively stripped back to absolute maximum ratings, the gain terms and the characteristic curves, so the numbers needed to bias a stage increasingly come from accumulated rules of thumb rather than from the sheet.[301] Every driven transistor brings a resistor with it, whether a base resistor or a pull-up for an open-collector output, which is why passive count tracks transistor count in discrete designs.[128]

Parameter spread and second sourcing

Transistor characteristics vary across production, and a build of 10 to 1,000 units typically draws from a single reel, so the parts behave alike and the spread stays hidden; at volume the design meets whole distributions of threshold voltage, and a design that assumed laboratory samples can stop working on a reel sitting at one extreme.[279] Second-sourcing a transistor widens the parameter spread a design must absorb, because two manufacturers’ parts differ even when nominally equivalent; the defence is to build tolerance for variation into the design rather than to rely on any one supplier’s typical values.[279] A transistor whose beta has drifted slightly out of tolerance inside the most sensitive part of a circuit is among the hardest faults to find in equipment repair, because the device still functions and the symptom only appears at circuit level.[227] Curve-tracing parts removed from a suspect board is an effective troubleshooting method; in one case it exposed a threshold voltage spread of about two volts that was within the part’s published specification but outside the range the circuit had been designed around.[78]

A related long-term hazard is the silent redesign of a long-lived part number: in one case an op-amp’s input stage was changed from NPN to PNP front-end transistors and the 600-ohm load drive the part was known for disappeared from the data sheet, so a newly purchased part cannot be assumed to behave like the one originally designed in.[727]

Digital interfacing

A totem-pole digital output uses two transistors, one pulling high and one pulling low, so both edges are actively driven; an open-collector output such as I2C pulls down actively and relies on a pull-up resistor for the rising edge, which is why the falling edge is near-instantaneous on a scope and the rising edge visibly slower.[274] A CMOS inverter is two MOSFETs, N-channel and P-channel, with their gates tied together and their outputs tied together in a totem-pole arrangement; NMOS logic built the same function from three transistors of a single type and so did not need the two doping types CMOS requires.[351]

Logic inputs carry a maximum input slew-rate specification, around 500 ns for 74HC parts, and an edge slower than that voids the guaranteed behaviour: the device may enter a metastable state, and a clock input driven that slowly can oscillate metastably.[482] A CMOS totem-pole clock output can degrade over a chip’s life until the upper transistor no longer pulls high; because a totem-pole output carries no pull-up resistor there is nothing to hold the line, and the field fix is an external pull-up of around 100 ohms for a 25 MHz clock on a capacitive bus, drawing roughly 33 mA and producing a visibly stepped rising edge.[482] Pulling an open-collector output up to 12 volts where the device expects 5 volts drives its output transistor backwards, conducting through the base-collector junction in a mode the part was never designed for.[222]

Power circuits

A push-pull stage alternately switches an N-type device on top and a P-type on the bottom to drive a transformer or inductor, so power can be stepped up or down and rectified on the far side; dedicated controller chips exist to drive such discrete output pairs.[9] In a complementary push-pull output stage, an NPN that turns off more slowly than the opposing PNP turns on produces shoot-through current straight between the rails; where faster devices are not available the switching frequency has to be reduced until the turn-off delay no longer matters, at the cost of bandwidth.[180] Power conversion trades efficiency against noise: holding transistors in their linear region to drive a sinusoid through a transformer gives a clean output at around 20 percent efficiency, while hard-switching the same devices is efficient but generates substantial harmonics.[151]

Bench power supplies are built from discrete op-amps and transistors because no off-the-shelf chip provides adjustable voltage and current while staying stable across all loads; parts designed for other purposes, such as class-AB amplifier drivers, are sometimes pressed into the role, but only after being breadboarded and tested.[362] A single-transistor follower power supply is trivial to draw and hard to make stable across the full load range, which is where the design effort concentrates; the same topology has to be re-derived separately for bipolar and MOSFET output devices.[88] Silicon carbide MOSFETs cost on the order of fifty dollars per device but withstand around 600 volts with milliohm-order on-resistance and long service life, which is what justifies them against IGBTs and trench FETs in high-efficiency power conversion.[205]

Audio applications

Early fuzz circuits produced distortion by underbiasing their transistors into non-linear operation; the sound was distinctive but the bias point moved with temperature, so behaviour was unpredictable in use, and later designs obtain distortion instead from diode clipping, amplifier overdrive, compression or parallel distortion chains.[263] The guitar distortion box originated in a two-transistor circuit built to overdrive the input of a guitar amplifier, designed by a Bell Labs circuit designer and commercialised by Electro-Harmonix in the late 1960s.[424] Recreating vintage synthesiser circuits requires the original low-grade transistors because the sound depends on their imperfections; scarcity of one specific part used in a well-known Moog design has driven its secondhand price to extreme levels.[119] Substituting a higher-bandwidth transistor into an existing stage is not automatically an improvement: the extra bandwidth amplifies noise that the slower device had attenuated, in one case degrading a clock signal.[290] A vacuum-tube amplifier is tractable to a beginner because the circuit is about five components and can be reasoned through without formal training; adding transistors to such a design is what stabilises the current sources and holds the bias conditions constant.[560]

Radio-frequency applications

An AM transmitter can be built from a tank circuit and a single transistor; a second transistor is needed only where the microphone signal has to be amplified first.[28] A super-regenerative receiver front end is a single transistor: the oscillator quenches itself at roughly half a megahertz to a megahertz, an incoming signal supplies extra energy so oscillation restarts sooner, and the resulting sawtooth is low-pass filtered, integrated and squared up through an op-amp.[93]

Role alongside integrated circuits

A discrete transistor in an otherwise integrated design is usually there because that node handles more power than a logic-level or opto-isolated output could, which also makes it a disproportionately likely failure point.[290] Discrete transistors remain useful inside otherwise integrated designs for small jobs such as level shifting, and transistor-level work in the analog domain permits arrangements that cell-level design does not.[424] A multimeter can be built from discrete transistors switching ranges and loads into a microcontroller ADC rather than a dedicated multimeter chipset, but everything the chipset provides, particularly autoranging and mode switching with their timing and gate-capacitance requirements, then has to be reproduced in software.[455] A discrete-transistor processor built as a demonstration machine used 42,300 transistors and filled a room roughly two metres tall by ten metres long.[306]

Failure modes and troubleshooting

Silicon transistors respond to light, which is why dice are packaged in opaque plastic or sealed metal cans; where light reaches a die the effect shows up as subtle intermittent misbehaviour, single bits changing rather than outright failure.[27] Counterfeit power transistors predate the internet: genuine high-power TO-3 parts cost ten to twenty dollars, and fakes were identified by cutting the can open, where a visibly undersized die could be seen without a microscope.[322] When a board cannot be powered up, in-circuit voltage measurement is unavailable and the remaining method is to desolder components one at a time and check each in a component tester.[543] A curve tracer makes an unmarked transistor usable without identifying it: measuring its characteristics directly is sufficient to place a bias point and use it in an amplifier.[353]

Learning and experimentation

A single NPN with two resistors, a supply on the collector resistor and an independently set base voltage, is enough to explore biasing experimentally; with both supplies limited to five volts the device cannot be damaged, which removes the beginner’s fear of destroying the part.[353] For a given function such as an oscillator, working down from an integrated part to an op-amp implementation and only then to discrete transistors is the more productive order to learn in, and inverts the sequence most textbooks use.[301] One structured route through digital fundamentals starts at the semiconductor, builds transistors from it, gates from transistors, latches from gates, registers from latches and finally a CPU from those blocks, so each level answers the question the level above it leaves open.[444] A transistor-level diagram becomes readable by recognising the standard structures inside it, such as a differential amplifier and a current source, and mapping them onto the simplified block view of the same circuit, in which the arrangement appears as an op-amp driving a transistor under feedback control.[574] Data books once printed the internal transistor-level schematics of parts such as the 555 timer, in enough detail that the part can be rebuilt from discrete transistors and will work.[609]

Simulation

Berkeley SPICE cannot execute the device models supplied by commercial semiconductor manufacturers: even a diode model expressed with a recombination current term will not run, and transistor models will not run at all.[196] Because SPICE solves a non-linear system by successive linear approximation, every device model’s IV curve must be continuous in both value and first derivative; every semiconductor model in Berkeley SPICE has a discontinuity somewhere, and those defects were copied into commercial simulators, including a discontinuity in PSpice’s diode curve.[196] A typical analog switching-regulator part contains 5,000 to 8,000 transistors; simulating the first five milliseconds of its start-up transient took around 30 hours on one simulator against six hours on another, which is the difference between a result the designer can still act on and a lost day.[196] Simulation earns its place for testing a circuit concept quickly when the parts are not to hand, but a simulated design is not a validated one; low-level component behaviour is worth learning first so that simulation is not used as blind trial and error.[210]

Fabrication

Industrial processes

Transistor doping concentrations run in the parts-per-million to parts-per-billion range; an ion implanter sets both the depth and the number of dopant atoms precisely, whereas the diffusion available in a home setup gives far less control over either.[390] Ion implantation dopes selectively because a thick photoresist stops the beam everywhere except the opened areas; a subsequent oven step drives the implanted ions so they spread, after which the etch and resist sequence repeats for the next layer.[215]

Thermal evaporation deposits interconnect metal by passing 800 to 1,000 amps through a dimpled tungsten strip holding pellets of aluminium inside a vacuum chamber; the strip reaches about 1,800 Celsius, the metal boils, and the vapour condenses on every surface in the chamber, so areas that must stay clean are masked with foil.[390] Sputtering is the slower alternative to thermal evaporation: argon is flowed into the chamber and a high potential struck between a negatively biased target and the substrate, so argon ions accelerate into the target and chip off atoms that cross the low-pressure chamber and coat the substrate.[390]

Transmission electron microscope cross-sections of leading-edge transistors show features 50 to 70 atoms wide; most designs do not need that node, and analog parts such as op-amps are typically built at 250, 130 or 90 nanometres.[390] Leading-edge gate widths below ten nanometres demand accuracies that are hard to grasp from the process description alone; a designer who wants only an op-amp does not need that node and gains most of the practical benefit from far older processes.[390] Fabs produce test wafers carrying every process element—transistors, resistors and capacitors—in a range of sizes and individually labelled, as process characterisation structures rather than as working circuits.[345]

Home fabrication

Jeri Ellsworth demonstrated home transistor fabrication with household chemicals and second-hand equipment for around a thousand dollars in materials, using a diffusion furnace; the first working device took about three years, and the natural milestones beyond a single transistor are a NAND gate and then a ring oscillator, which demonstrate that devices can be interconnected and that the process is fast enough to sustain oscillation.[52] In her process, a working transistor takes about twelve hours to produce and a failed device costs the same twelve hours, so yield loss in a garage process is paid entirely in time rather than in materials.[52] In a home-fabricated process, cascading logic stages runs out after three or four transistors in a line, because the accumulated drop leaves too little output swing to drive the next stage.[390] Simulation effort scales with the cost of being wrong: a commercial shuttle run costs thousands of dollars per attempt and is therefore simulated exhaustively, whereas Sam Zeloof’s garage process, where a bad mask costs nothing, supports iterating in silicon instead.[390]

Understanding device structure

Device structure is learned faster from a labelled three-dimensional model of the silicon layers whose parts can be hidden and shown than from the top-down die photograph and cross-section drawing that textbooks supply, because the two conventional views have to be reconciled mentally.[215] A die photograph aligned against the corresponding PN-junction cross-section is the bridge between the abstract device model and the physical structure; the difficulty in learning semiconductors is translating between the top-down and cross-sectional views, which two-dimensional teaching material leaves unaddressed.[215]

Integrated circuit design

Device options within a process

A process design kit supplies a fixed set of transistor flavours, typically low, regular and high threshold voltage, which trade digital logic speed against power; the designer’s remaining knobs are flavour and device size, and doping cannot be tuned as a continuous parameter, although N-wells, P-diffusions and polysilicon can be placed by hand in layout where a design needs it.[579] Layout-versus-schematic checking identifies a transistor as a gate with a diffusion on each side and requires the count in layout to equal the count in the schematic; it also enforces the fourth terminal, the body, which designers habitually tie to ground, and where separate power domains share the bulk silicon it reports a soft connect through the substrate and fails the design, because that path is a latch-up risk.[579]

On-chip analog design inverts the discrete trade-off: individual integrated components are poor and their absolute spread is wide, but transistors cost nothing to add, so designs compensate for device quality by using far more devices than a discrete equivalent would.[338] Switching a transistor on and off costs a fixed quantity of charge delivered into its gate, and that gate charge is a real loss term in a switching circuit, independent of conduction loss.[338] Heat from a single overloaded transistor spreads across a die at roughly one micrometre per microsecond, a rate set by the silicon itself rather than by external heat sinking.[351]

A 65 nm process gives a 1.2 volt core supply, which permits only a small number of stacked gate-source voltages, and an on-chip resistor must be snaked as a long path of resistive material; together these make a transimpedance amplifier needing a large feedback resistor disproportionately expensive to integrate.[579] As processes improve, supply voltages shrink but transistor parasitic capacitances fall, which favours representing a signal in the time domain rather than the voltage domain: feeding a current into a ring oscillator yields a frequency that can be digitised directly, instead of converting the current to a voltage first.[579] A switch transistor dumping charge takes roughly 70 picoseconds to do so at room temperature, and that figure moves across a minus 30 to plus 100 Celsius range, so the timing has to be characterised over temperature rather than treated as a constant.[579]

Scaling and its limits

Transistor count per chip has continued to double while single-threaded performance has flattened and core count has risen, so the headline Moore’s law figure no longer implies a matching gain in delivered performance.[501] Moving to a smaller process node buys transistor density, power and speed at the cost of wafer price, manufacturing yield, leakage, radiation tolerance and possibly long-term silicon degradation, and it forces gate voltages down.[347] Bond pads shrink far more slowly than transistors, so a die on an advanced node can become pad-limited, its area set by its input-output count rather than by its circuitry.[272] Smaller nodes impose orientation rules such as polysilicon that may run in only one direction, so IP blocks cannot be rotated; combined with the move from planar geometry to FinFET, this means an existing design cannot simply be shrunk from one node to another.[687] Device scaling shrank intrinsic parasitic capacitances to the point where making a transistor that generates signals in the hundreds of gigahertz is routine in a state-of-the-art silicon process; at around 100 GHz the on-chip wavelength is a few hundred microns, which sets the physical dimensions of the circuitry.[228]

Connecting two packaged chips on a board steps up from a 14 nm transistor through a 70 micron die pad, a package trace, a 0.5 mm pitch BGA and an 8 mil PCB trace, then back down the same ladder on the other side, roughly a millionfold expansion and contraction in feature size; eliminating those steps by placing bare die together in one package is the argument for system-in-package, at the cost of losing the ability to swap parts.[469]

A defect in a memory array costs one cell and can be absorbed by redundancy, whereas a defect in a processor’s logic can kill the die; that asymmetry gives memory and logic different yield economics on the same process.[166] Putting flash on a die is complex and expensive to manufacture, so very high volume disposable products use mask ROM programmed during fabrication instead, alongside minimal analog such as a 4-bit ADC and a battery gauge, with the die carrying no more transistors than the function needs.[98] Compact SRAM and DRAM bit cells are proprietary foundry IP, so an open process design kit forces on-chip memory to be built from ordinary transistors holding state in flip-flops, which occupies far more area; the same area cost is why adding flash or SRAM between variants of a microcontroller family is expensive.[673]

Design abstraction levels

A NAND gate is four to six transistors, and most logic is built up from NAND gates, so gate-level design sits one abstraction above the silicon rather than at it.[400] Transistors cost on the order of a nanopenny per gate, so the difference between spending twenty and twenty thousand of them is negligible and systems can be assembled at the Verilog, VHDL or IP level without regard to structural cost, until the design has to run from a battery and the cost reappears as power.[302] Integrated and board design fail in different ways: an IC designer works from about a hundred parameterised, known-good transistor types and finds it hard to commit a physical error such as a short circuit, whereas a board designer chooses among millions of parts and unverified downloaded footprints, so architectural mistakes dominate in one domain and physical ones in the other.[579]

Hand-drawn transistor-level design does not scale far: working from published papers to build a voltage reference on an open PDK, Matt Venn found a seven-transistor circuit already past the comfortable limit.[672] A shared multi-project tile in the first Tiny Tapeout run measured 120 by 120 microns, enough for roughly 500 to 600 standard cells behind eight inputs and eight outputs; a schematic drawn in a browser tool is exported as a Verilog netlist and pushed automatically through the open-source flow and PDK to produce a GDS file and a report of the standard cells used.[616] Transistor-level custom silicon became reachable through an open-source layout program for around three thousand dollars, at a far higher learning cost than a system-level ASIC flow.[141]

With clock speed, power and core count all saturated, additional transistors are increasingly spent on application-specific rather than general-purpose computing; that is only worthwhile where an application can bear both the up-front design cost and the ongoing maintenance.[672] As chip prices fall, architectural innovation shifts from integrating more transistors, which only companies with fabrication access can do, toward using more chips per board, which individuals and small teams can do; a task that once took months of bring-up per additional chip becomes a viable architecture.[84]

Reverse engineering and failure analysis

Reverse-engineering a die under an optical microscope is practical up to roughly mid-1970s parts, where 50x magnification resolves the structures and the transistor count is low enough to follow; higher magnifications such as 400x introduce more problems than they solve and are needed only for far newer dies.[361] Ken Shirriff’s working method for reading a die is to sketch on paper where the transistors are and how they are connected, then study it until the circuit resolves, simulating any sub-circuit that stays unclear in an analog simulator; the background required is period literature on the process technology of the era rather than formal training.[361] Custom single-in-line integrated circuits of the period were decapsulated by dripping acid onto the package.[253]

Failure analysis on preliminary silicon decapsulates the die and locates faulty transistors under an electron microscope; defects with a simple fix are corrected at transistor level by the test group, while faults that propagate through the system are returned to the original designers.[371] A scanning electron microscope images surface topography and in some cases surface composition, which makes it the standard instrument for semiconductor process diagnosis: a failed transistor taken apart and imaged will usually show what went wrong.[431] Carriers that fail to complete the transit between source and drain emit photons, and because silicon is transparent to infrared that emission can be imaged straight through the substrate with an infrared camera, showing which transistors on a die are switching.[303]

Alternative and emerging transistor technologies

In printable semiconductor materials, ions mobile within the material limit switching speed and can prevent a usable on-off ratio at all, which is the main obstacle to printed transistors even where printed solar cells already work.[433] Carbon nanotubes suspended in a liquid can be formulated as a printable ink, but printing that ink supplies only one layer of a transistor: the substrate, source, drain and gate still have to be made by other means.[50] Printed electronics reached a cumulative hundred million printed devices at a complexity comparable to 7400-series logic, which is a few dozen to a few hundred transistors per part.[234]

In silicon quantum computing, spin readout uses a modified MOSFET about 50 by 100 nanometres across, deliberately made strongly non-linear so it acts as a switch rather than a linear amplifier; displacing a single electron in its vicinity shifts its bias point by the equivalent of some tens of millivolts, which is enough to turn it from off to on.[498] When the readout transistor conducts it passes about a nanoamp, measurable in real time, so the quantum state of a single spin appears as a step in current on an oscilloscope; the spin-up state sits 1.3 kelvin, or about 120 microvolts, above the lowest energy state, which is just enough for the electron to escape the atom into the transistor’s drain.[498] Single dopant atoms are placed deterministically by combining an ion implanter with an atomic force microscope whose tip carries a nanometre hole and acts as a movable mask aligned to marks on the device; an on-chip detector derived from a radiation detector registers the roughly thousand electron-hole pairs created when one ion lands, and the beam is blanked immediately—a modification of, not a departure from, the way dopants are introduced in ordinary chips.[498] A quantum computer keeps the binary logic of a classical processor but encodes the states in a quantum property of a suitable object, such as the spin of a dopant atom in silicon, rather than in the electrical state of a nanoscale transistor.[498]

References

EpisodeTitleDate
9From Boston In Boxers?
18Transistor Types and Where To Get Electronic Gear
25NASA, WOTW & Modular Design - The NASA Nostalgia
27555 Contest, Computer Museum, Octopart - The Green Pen Hornswoggle
28Bowie and The Brown NoteFebruary 1, 2011
50Callow Cough Coverups
52An Interview with Jeri Ellsworth - Carnassial Chip Chemicals
60An Interview with Joe Grand - Pancyclopaedic Prototyping Polymath
77An Interview with Dr. Howard Johnson - Winsome Waveform WizardryJanuary 9, 2012
78Alteritous Andy's AbsquatulationJanuary 16, 2012
84An Interview with Bunnie Huang - Bunnie's Bibelot BonificationFebruary 27, 2012
88Yonderly Yodeling YobbosMarch 25, 2012
93An Interview with Tom LeMense - Cacaesthestic Chronometric CarriwitchetApril 29, 2012
98Proemial Passive PoiesisJune 3, 2012
119An Interview with Dr. Kent Lundberg - Luculent Linear LegacyOctober 28, 2012
125An Interview with Ian Lesnet - Bus Buccaneer BuilderDecember 10, 2012
128Layout, CAD & Raspberry Pi - Kedogenous Kinetic KnowledgeJanuary 15, 2013
141FPGAs, Robots & Thermocouples - Wampum's Wavering WorthApril 15, 2013
151Google Glass, Lean Startup and VotC - Initializing Instructed InterviewsJune 24, 2013
166Prior Art, Wafer Fabs and Guns - Whimsical Wafer WafflingOctober 7, 2013
171An Interview with Forrest Mims - Snell Solisequious ScientistNovember 11, 2013
180An Interview with Dave Taylor - Multi-talented Meter MakerJanuary 13, 2014
196An Interview with Mike Engelhardt - SPICE Simulator SynteresisApril 28, 2014
200SolidCon and Traveling Tech - Joined Junk JocularityMay 26, 2014
205Solar Factories and HVDC Lines - Pollent Power PushingJune 30, 2014
210Risky Components and Hardware Innovation - Slipshod Shack ShutdownAugust 5, 2014
211Design Reviews Are Important - Habitual Hype HebetudeAugust 11, 2014
215Wrong Hardware, Wrong Software - Fugacious Fan FundingSeptember 7, 2014
222An Interview With Bil Herd - Zany Z80 ZygologyOctober 27, 2014
227Space Bound, Again - Xtreme Xtraplanetary XenonosocomiophobiaDecember 8, 2014
228An Interview with Shahriar from The Signal Path - Quisquous Quivering QuadripoleDecember 16, 2014
234We'll Believe It When We See It - Hiring Hypercatalectic HelpelpJanuary 27, 2015
253Consolidate All The Things - Zonked Zelotic ZaitechJune 9, 2015
263An Interview with Fran BlancheAugust 19, 2015
272An Interview With Luke Beno of Analog.ioOctober 21, 2015
274Our First Call In ShowNovember 4, 2015
279Merry Keyzermas!December 22, 2015
290An Interview with Mark Morin of NufernMarch 9, 2016
301The Nerd CalendarJune 1, 2016
302An Interview with Clint Cole of DigilentJune 8, 2016
303An Interview with Dmitry NedospasovJune 14, 2016
306Catalyzing Change AgentsJuly 6, 2016
313My Kind of TownAugust 31, 2016
322World Trade Futurity (WTF)November 9, 2016
328The Ghost of Keyzermas PastDecember 21, 2016
333Science, Not SilenceJanuary 25, 2017
338An Interview with Jørgen JakobsenMarch 5, 2017
345Milling AboutMay 30, 2017
347Re-scoping the problemJune 13, 2017
351The Automation AmishJuly 10, 2017
353IoT DegreeJuly 23, 2017
361An Interview with Ken ShirriffSeptember 25, 2017
362Secret SquirrelOctober 1, 2017
371An Interview With Joe BambergDecember 10, 2017
390An Interview with Sam ZeloofApril 29, 2018
400Once Every Couple Months
424An Interview with Julia TruchsessJanuary 6, 2019
431An Interview with Adam McCombsFebruary 24, 2019
433An Interview with Sam StranksMarch 10, 2019
444An Interview with Ben EaterMay 27, 2019
455Bill and Dave's Excellent EquipmentAugust 19, 2019
469An Interview with Craig J BishopDecember 1, 2019
482Shine A LightMarch 1, 2020
484Man Behind The CurtainMarch 16, 2020
498Quantum Computing with Andrea MorelloJune 28, 2020
501Discussing the Open Source PDK with Tim AnsellJuly 19, 2020
543Cassette decks have browsers?May 23, 2020
560High End Audio with Remco StoutjesdijkOctober 3, 2021
574Bubblegum Tap ShoesJanuary 23, 2022
579ADC Chip Design with Anthony WallFebruary 27, 2022
609Open Circuits with Eric Schlaepfer and Windell OskayNovember 13, 2022
616Open Source Tapeout with Matthew VennJanuary 22, 2023
672Silicon Revolution with Matt VennJune 30, 2024
673Lifelong Learning with BitluniJuly 15, 2024
687The RP2350 with the Raspberry Pi TeamJanuary 28, 2025
709Nobel Prize Winner Dr Barry MarshallNovember 10, 2025
727Boat Anchor WarehouseJuly 1, 2026