| Episodes | 69 |
| Mentions | 83 |
| Cited here | 44 |
| First — last | #2 — #715 |
| Top guests | Elecia White, Matt Liberty, Andrea Longobardi |
| Related | battery life · internet of things · arduino · bluetooth · fpga |
Low-power design is the engineering discipline of minimising the energy an electronic system consumes, spanning analogue and digital technique for holding devices and microcontrollers at currents far smaller than ordinary practice habitually spends.[7] It matters wherever the energy supply is constrained: in energy-harvesting systems the quiescent leakage of the parts around the harvester competes directly with a very small energy income, and in connected battery devices the cost of remaining attached to a network dominates even as microcontroller sleep currents fall to a few microamps.[7][315] Low-power operation is a property of the whole system rather than of any single part, since one general-purpose component drawing a few milliamps rules out coin-cell operation on its own.[226] On a battery-powered product, assembling the working function from off-the-shelf hardware can be a matter of days while the low-power engineering that makes the combination viable absorbs years of effort.[301]
History
CMOS entered production not as a general-purpose logic technology but through wristwatches, where its capability for low power mattered and its inability to run fast did not; from there it moved into calculators before being considered for anything larger.[459] The industry began moving microprocessors and memory to CMOS in the mid-1980s, when dissipation in those parts had grown to the point that power appeared to be the overarching limit; before that transition it was genuinely open whether CMOS would ever be a mainstream technology.[459]
Low power subsequently became an axis of silicon design in its own right. The core of an early ultra-low-power microcontroller family was licensed from ARM because that vendor’s design effort was directed at reducing die size and power consumption together, matching the licensee’s target; MIPS had been the alternative under consideration.[95] The MSP430 family came to occupy the rung below the ARM microcontrollers in both power consumption and processing capability, and combining its 16-bit core with an acquired radio design on one die produced parts offering a highly configurable sub-gigahertz link alongside a microcontroller that costs almost no power.[442] In radio standards, low-power audio profiles were added to the Bluetooth specification under pressure from the hearing-aid industry, which needed streaming audio inside a budget no existing profile could meet, with the resulting work expected to be reused across other industries.[338]
Fundamentals
Low-power operation is a property of the whole system rather than of any one component: a general-purpose 8-bit microcontroller drawing a few milliamps rules out coin-cell operation by itself, so the entire design has to be arranged for low power before a coin cell becomes a viable supply.[226] In an energy-harvesting system the same logic is sharper still: feasibility is set by the quiescent leakage of the parts around the harvester rather than by the harvester itself, because anything that draws current while the system is idle competes directly with a very small energy income.[7]
Duty cycling
Two distinct strategies exist for cutting average processor consumption: run at full speed and shut down between tasks, relying on a low standby current, or run continuously at a much lower clock such as 32 kHz.[59] Application-class silicon typically supports only the first, since its low-power effort goes into standby rather than into efficient operation at low frequencies.[59] The governing rule for a duty-cycled processor is to complete whatever work has woken it as quickly as possible so that it can return to sleep, because the energy budget pays for the time spent awake rather than for the work performed.[187] A workload that must process continuously, such as an audio recorder capturing to storage, cannot be put to sleep at all, which leaves dynamic adjustment of the processor clock as the remaining lever on its consumption.[10]
Figures of merit
Active consumption on a microcontroller is quoted per megahertz rather than as an absolute, which makes microamps per megahertz the comparable figure; a low-cost Bluetooth part of this class runs at around 32 microamps per megahertz and operates down to 1.7 volts.[636] Whether code executes from on-chip flash or from RAM changes a microcontroller’s active current by a couple of microamps per megahertz, so the memory the firmware runs from is a power decision and not only a speed one.[636] In analogue parts the meaningful low-power figure of merit is power for a given bandwidth, since consumption scales with the bandwidth the amplifier must support; parts with exceptional distortion performance and very low supply current commonly buy both by restricting bandwidth to a few kilohertz.[65]
Scaling and integration
Power consumption tracks the silicon resources a design instantiates, so there is a continuing case for small memories and small processors: bringing a hundred million transistors out of reset to use one million of them costs power that a modest application has no reason to spend.[489] Selecting a part with no surplus capability is itself a low-power decision: on his company’s wearable product, Eric Migicovsky’s team chose a small part that did exactly what the product needed and nothing more, because power consumption was the governing requirement.[715] Integrating the analogue front end, microcontroller and signal processing onto a single die lowers power relative to the same functions assembled from separate packages on a board, so a board-level design using discrete equivalents cannot match a monolithic part on an energy budget.[184]
Processor selection follows whichever requirement binds hardest on a given product, and an ultra-low-power target binds hard: only a few parts on the market meet it, so the designer accepts a vendor, architecture and toolchain that would not otherwise have been chosen.[642] With cheap and capable Cortex-M parts available, cost and capability alone are weak reasons to choose an 8-bit device, so the remaining reason is usually the peripheral set: a hardware-oriented designer will select an 8051-based part specifically for the peripherals it brings.[489]
Processor techniques
A processor should not be left running at its top clock rate merely because occasional bursts of computation require that speed; the standard technique is to switch the clock up, perform the work, and switch it back down, a facility present on most modern microcontroller families.[10] Where a processor derives its core clock from a PLL, the input frequency and multiplication ratio are themselves a power control: supplying eight or even three megahertz and multiplying up to thirty allows the PLL to be turned down and the part to draw substantially less current when the throughput is not needed.[187]
Processors with sleep instructions wake only on a restricted set of interrupt sources, so the system has to be arranged around that restriction: the events that must bring the device out of sleep have to be routed onto the interrupts the sleep mode actually honours.[187] A two-tier sleep architecture is common on modern microcontrollers: in the shallower mode the processors enter deep sleep and, once none is requesting clocks, a sleep-enable register determines which clocks keep running, so a real-time clock can be left alive to wake the part after a set interval.[529] The deepest sleep state stops every clock on the chip, which means nothing on the part can generate its own wake-up; an external event such as a GPIO edge is required to restart the clocks.[529] Families with selectively gated clock trees and separately powered blocks put the difficulty at bring-up rather than shutdown: getting each block powered and clocked correctly the first time is the awkward part, after which shutting blocks down individually is comparatively straightforward.[527]
Circuit techniques that reduce leakage on a digital part can raise its dynamic power, because the same measures increase the capacitance that has to be driven on the MOSFET gates; leakage and switching energy are traded against one another rather than reduced together.[529] Reaching the tens-of-microamps range demands deliberate analogue biasing work that a digitally focused design team may reasonably decline to take on; a best-effort approach to power management is a defensible choice where the team’s strength is architecture and digital design.[529] The low-power promise of the smallest ARM cores has often been passed over in favour of running a larger core at a reduced clock rate, which keeps throughput in reserve for the occasions when the application needs it while still bringing consumption down.[187] Pairing an application processor running Linux with a small low-power supervisory microcontroller that can shut the whole system down is a common design pattern, and the same supervisor covers safety-critical duties; an independent watchdog timer able to kill and reboot the operating system is the related mechanism.[515]
Firmware
Support for low-power states and for transitions between them is one of the primary determinants of how embedded firmware is structured, not a feature added afterwards: a project whose device wakes once a day on a cellular link cannot have that support retrofitted into a structure that assumed continuous operation.[556] General-purpose embedded frameworks tend to put their design effort into networking rather than power management, which leaves the designer to add the control needed to turn individual elements off; networking is itself among the hungrier subsystems, so the omission falls exactly where a battery design needs the most help.[556]
Event-driven structure is what makes a low-power design work under a real-time operating system, and some kernels provide a tickless mode so that the periodic timekeeping interrupt itself stops firing when nothing is scheduled.[581] Polling costs processor cycles whether or not it is wrapped in an operating-system task, because the core must still wake and check the device at whatever interval the application demands; routing the sensor into an interrupt pin or a serial peripheral that raises its own interrupt instead lets meaningful data arrive before any task runs.[581] More broadly, reducing power in an embedded system largely consists of stripping away the layers stacked on top of the hardware, since interpreters, high-level runtimes and real-time operating systems all keep the processor doing work the application did not ask for.[281]
The choice of programming language does not by itself determine a design’s power consumption; what matters is whether the code actually enables the low-power capabilities the silicon provides, which can be done from almost any language.[389] The association between low-level languages and low power is indirect: writing in C puts the developer closer to the hardware, so the same developers tend to be the ones switching subsystems off, whereas higher-level environments are leaned on as conveniences and the power question goes unasked.[389] Writing in a high-level language likewise does not preclude a low-power design, but it shifts the burden onto knowing what the toolchain emits and what the generated code will do at run time, and the tooling to give that visibility is not fully in place.[723] Resolving a device’s configuration at build time rather than at run time saves both power and boot time, because a generic configurable image spends energy at every start-up deciding what it is.[723] A dedicated font memory holding glyph bitmaps lets a power-constrained device render text without a higher-order operating system or a font-rendering stack: the microcontroller needs only a small routine that reads the glyph out of the font chip and transfers the data straight into the display.[700]
Radio and connectivity
A Bluetooth Low Energy link that wakes and transmits a burst every five to ten seconds averages on the order of a hundred microwatts, which serves as the planning figure when sizing a duty-cycled radio design before measurements exist.[218] A Bluetooth low-power system reduces energy along two axes at once: it works at extremely small duty cycles, with the radio circuits live only briefly and off ninety-five percent of the time or more behind a background digital controller, and it separately optimises the power drawn by the circuitry while it is on.[704]
With sleep currents on contemporary microcontrollers at around four microamps and often lower, the idle silicon is no longer what limits a connected battery device; the cost of remaining attached to a network dominates, so continuous connectivity rather than component count is the constraint on such designs.[315] Choosing Bluetooth Low Energy for its lower consumption is only worth its development difficulty where the energy budget is genuinely tight; in a product carrying four AA cells the saving would not have mattered and a classic Bluetooth module would have been the easier path.[354] Powering a radio module down entirely saves more than any of its internal low-power modes, and the cost is paid in reconnection time when the link has to be brought back up.[354]
Pre-certified radio modules remove the certification burden and simplify production, which makes them the default choice; a demanding low-power requirement is the usual reason to abandon the module and lay out a custom board around the bare silicon instead.[329] Within a single radio module family, the low-power and high-power variants can share the same silicon and differ only in how the module is wired and its passives arranged, with the high-power parts reaching 20 dBm or 100 milliwatts; the selection is a straight exchange of transmit range against battery life.[398]
Programmable logic
Powering an instrument entirely from a USB 2.0 port sets a hard ceiling on the energy budget, and meeting it while covering a very wide frequency range at the highest bandwidth the bus will carry is what makes such a design difficult: the power requirement, not the signal path, becomes the binding constraint.[214] On his software-defined radio front end, Michael Ossmann omitted the FPGA entirely, cutting both cost and power: a small CPLD proved sufficient for glue logic such as converting unsigned samples to signed integers, with the signal processing left to an ARM Cortex-M4 carrying DSP instructions.[214]
Programmable-logic vendors targeting power-sensitive applications build comparatively low-density fabrics suited to implementing IO interfaces and lightweight processing, rather than competing on density; the high-density data-centre parts require chasing the process node down to seven and ten nanometres, where mask sets alone cost millions of dollars each.[525] The useful distinction for programmable logic is between the data centre, where power is effectively free, and the edge, where customisation and computation are still wanted but have to fit inside a stated power envelope; the same fabric cannot serve both.[525] Generic programmable logic does not lend itself to battery operation, because a fabric only reaches useful sleep behaviour when targeted hard blocks with genuine power-down states have been designed into the silicon alongside it.[525]
Power supply and board-level design
The supply converter’s own quiescent current sets the floor of a sleeping design’s consumption, which makes quiescent current the selection criterion for the regulator; buck-boost converters with quiescent currents of a few hundred nanoamps are available for this reason.[557] Meeting a whole-board standby budget resolves into two separate regulator specifications: the front-end regulators that remain active must have a low quiescent current, and the downstream low-voltage regulators must have a low shutdown current, since these are different parameters governing different parts of the rail tree.[635]
The historical habit of pulling idle lines up to the supply rail is the wrong default for a low-power design: once the driving chip is powered down the pin can no longer be held high and the resistor draws current continuously, so arranging the logic so the idle state is pulled to ground removes that standing current.[527] A pull-up left connected to a powered-down section also back-powers that section through the resistor, so a pull-up is both a source of standing current and a route by which a shut-down subsystem is kept partly alive.[527] Bypass and bulk capacitors are a credible source of leakage in a microamp-level design: off-brand or bulk-sourced parts have caused significant leakage problems, so the decoupling network cannot be assumed to be free of standing current.[527]
Placing every sensor and the expansion connector behind switchable power gating means an unused peripheral contributes nothing at all to the sleep budget; on the Generic Node platform, this arrangement together with a deep stop mode on the microcontroller brought a complete sensor node to a measured sleep current of around 1.7 to 1.8 microamps.[557]
Industrial signalling standards are incompatible with an optimised power budget: a board carrying RS-485 transceivers and 4–20 mA current-loop drivers sustains standing current by design, so choosing an industrial interface set effectively forgoes low-power operation.[561] Where a board form-factor standard leaves a pin loosely specified, vendors targeting different markets assign it incompatible functions: one cellular board maker uses such a pin as a low-power cutout for designs chasing the lowest possible field consumption, while another uses it as a back-power input from an industrial supply, so nominally pin-compatible boards are not interchangeable.[600]
Sensors, displays and constrained environments
A bistable display costs energy only when the image changes, so it is the natural choice for a device that is powered down most of the time; adding a capacitive touch layer reintroduces a continuous scanning current, which means the residual draw of such a product sits in the input sensing rather than the display.[621] Driving one display rather than two, and accepting limited on-board computation, is what makes an all-day wearable head-mounted display conceivable; the immersive alternative sets the opposite design goal and cannot be worn for more than a couple of hours.[638]
The lens over a passive infrared element is a set of deliberately offset Fresnel facets, so that a body crossing the field presents heat alternately to different sections of the element; the sensor never settles fully on or off but sits in a linear state producing a varying voltage.[657] Passive infrared detection resists duty cycling because the element has to stay biased and its amplifier has to stay running for the sensor to be watching at all, which is why continuous motion sensing has historically been difficult to reconcile with a low-power budget.[657] Metal-oxide gas sensors of the common MQ type contain an internal heater element and require a long warm-up before they read correctly, which rules them out of a battery-powered design; converting an application from an older sensing technology to a lower-power equivalent is a distinct piece of engineering work driven by that constraint.[376]
A hearing-aid class device works to a total budget below one milliamp, of which only a small share is available for the analogue signal path and the wireless link together, so the power allocation between subsystems has to be settled before any of them is designed.[338]
Automotive electronics that stay connected to the vehicle battery when the car is switched off are specified at the board level rather than the part level: a customer requirement that the entire assembly consume less than a hundred microamps in that state is typical for infotainment hardware.[635] The automotive supply rail is hostile as well as always present: it rises to forty volts during load dump and falls to around three volts during cold cranking, and the display must not blank at the low end, so a front-end boost stage is required alongside the low-quiescent-current requirement.[635]
Explosion-protection certification imposes a thermal limit rather than a power limit: with a dead short assumed inside the protected device, no component on the board may exceed a stated surface temperature, because it is the temperature rise alone that can ignite the surrounding gas.[635] The arithmetic behind that limit is direct: a three-volt rail from a converter capable of one amp can deliver three watts into a fault, and a TQFP package with a thermal resistance near fifty degrees Celsius per watt then rises about a hundred and fifty degrees, far past the permitted ceiling.[635] The standard mitigation is a series resistor of one to ten kilohms between the supply and the protected device’s power pin, which caps the energy a fault can deliver; that resistor also fixes the device’s current budget, since anything drawing more than microamps develops enough voltage across it to brown the part out, which is why certified equipment of this class is built from low-power silicon.[635]
Measurement and optimisation practice
A total current reading cannot be attributed to any one subsystem, so in a system carrying several microcontrollers and peripherals the work of finding an unexpected consumer is a matter of understanding the design; an instrument can show that excess current exists and quantify it, but not say where it comes from.[527] Requests for help with energy consumption usually arrive as a narrow question about one routine when the real problem is the product’s overall energy target; the productive response is to establish what the design as a whole has to achieve before optimising any part of it.[607]
One workable order of design for a power-constrained platform is to drive every subsystem’s consumption as low as it will go first, then see what total that produces and absorb any remaining shortfall by cutting the duty cycle.[518] On his team’s satellite hardware, Joris Aerts applied this order directly, reserving reduced sampling over certain regions as the fallback for the first generation.[518] A power-optimisation review of an existing board usually begins with what is visible on it: in his consulting reviews, Pallav Aggarwal finds indicator LEDs in quantity and linear regulators scattered across the design accounting for a large share of the excess before any firmware is examined.[661]